
itoa:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004c0 <.init>:
  4004c0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004c4:	910003fd 	mov	x29, sp
  4004c8:	94000034 	bl	400598 <printf@plt+0x58>
  4004cc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4004d0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004e0 <__libc_start_main@plt-0x20>:
  4004e0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004e4:	90000090 	adrp	x16, 410000 <printf@plt+0xfac0>
  4004e8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ec:	913fe210 	add	x16, x16, #0xff8
  4004f0:	d61f0220 	br	x17
  4004f4:	d503201f 	nop
  4004f8:	d503201f 	nop
  4004fc:	d503201f 	nop

0000000000400500 <__libc_start_main@plt>:
  400500:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400504:	f9400211 	ldr	x17, [x16]
  400508:	91000210 	add	x16, x16, #0x0
  40050c:	d61f0220 	br	x17

0000000000400510 <memset@plt>:
  400510:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400514:	f9400611 	ldr	x17, [x16, #8]
  400518:	91002210 	add	x16, x16, #0x8
  40051c:	d61f0220 	br	x17

0000000000400520 <__gmon_start__@plt>:
  400520:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400524:	f9400a11 	ldr	x17, [x16, #16]
  400528:	91004210 	add	x16, x16, #0x10
  40052c:	d61f0220 	br	x17

0000000000400530 <abort@plt>:
  400530:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400534:	f9400e11 	ldr	x17, [x16, #24]
  400538:	91006210 	add	x16, x16, #0x18
  40053c:	d61f0220 	br	x17

0000000000400540 <printf@plt>:
  400540:	b0000090 	adrp	x16, 411000 <printf@plt+0x10ac0>
  400544:	f9401211 	ldr	x17, [x16, #32]
  400548:	91008210 	add	x16, x16, #0x20
  40054c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400550 <.text>:
  400550:	d280001d 	mov	x29, #0x0                   	// #0
  400554:	d280001e 	mov	x30, #0x0                   	// #0
  400558:	aa0003e5 	mov	x5, x0
  40055c:	f94003e1 	ldr	x1, [sp]
  400560:	910023e2 	add	x2, sp, #0x8
  400564:	910003e6 	mov	x6, sp
  400568:	580000c0 	ldr	x0, 400580 <printf@plt+0x40>
  40056c:	580000e3 	ldr	x3, 400588 <printf@plt+0x48>
  400570:	58000104 	ldr	x4, 400590 <printf@plt+0x50>
  400574:	97ffffe3 	bl	400500 <__libc_start_main@plt>
  400578:	97ffffee 	bl	400530 <abort@plt>
  40057c:	00000000 	.inst	0x00000000 ; undefined
  400580:	00400840 	.inst	0x00400840 ; undefined
  400584:	00000000 	.inst	0x00000000 ; undefined
  400588:	00400908 	.inst	0x00400908 ; undefined
  40058c:	00000000 	.inst	0x00000000 ; undefined
  400590:	00400988 	.inst	0x00400988 ; undefined
  400594:	00000000 	.inst	0x00000000 ; undefined
  400598:	90000080 	adrp	x0, 410000 <printf@plt+0xfac0>
  40059c:	f947f000 	ldr	x0, [x0, #4064]
  4005a0:	b4000040 	cbz	x0, 4005a8 <printf@plt+0x68>
  4005a4:	17ffffdf 	b	400520 <__gmon_start__@plt>
  4005a8:	d65f03c0 	ret
  4005ac:	00000000 	.inst	0x00000000 ; undefined
  4005b0:	b0000080 	adrp	x0, 411000 <printf@plt+0x10ac0>
  4005b4:	9100e000 	add	x0, x0, #0x38
  4005b8:	b0000081 	adrp	x1, 411000 <printf@plt+0x10ac0>
  4005bc:	9100e021 	add	x1, x1, #0x38
  4005c0:	eb00003f 	cmp	x1, x0
  4005c4:	540000a0 	b.eq	4005d8 <printf@plt+0x98>  // b.none
  4005c8:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x500>
  4005cc:	f944d421 	ldr	x1, [x1, #2472]
  4005d0:	b4000041 	cbz	x1, 4005d8 <printf@plt+0x98>
  4005d4:	d61f0020 	br	x1
  4005d8:	d65f03c0 	ret
  4005dc:	d503201f 	nop
  4005e0:	b0000080 	adrp	x0, 411000 <printf@plt+0x10ac0>
  4005e4:	9100e000 	add	x0, x0, #0x38
  4005e8:	b0000081 	adrp	x1, 411000 <printf@plt+0x10ac0>
  4005ec:	9100e021 	add	x1, x1, #0x38
  4005f0:	cb000021 	sub	x1, x1, x0
  4005f4:	9343fc21 	asr	x1, x1, #3
  4005f8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005fc:	9341fc21 	asr	x1, x1, #1
  400600:	b40000a1 	cbz	x1, 400614 <printf@plt+0xd4>
  400604:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x500>
  400608:	f944d842 	ldr	x2, [x2, #2480]
  40060c:	b4000042 	cbz	x2, 400614 <printf@plt+0xd4>
  400610:	d61f0040 	br	x2
  400614:	d65f03c0 	ret
  400618:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40061c:	910003fd 	mov	x29, sp
  400620:	f9000bf3 	str	x19, [sp, #16]
  400624:	b0000093 	adrp	x19, 411000 <printf@plt+0x10ac0>
  400628:	3940e260 	ldrb	w0, [x19, #56]
  40062c:	35000080 	cbnz	w0, 40063c <printf@plt+0xfc>
  400630:	97ffffe0 	bl	4005b0 <printf@plt+0x70>
  400634:	52800020 	mov	w0, #0x1                   	// #1
  400638:	3900e260 	strb	w0, [x19, #56]
  40063c:	f9400bf3 	ldr	x19, [sp, #16]
  400640:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400644:	d65f03c0 	ret
  400648:	17ffffe6 	b	4005e0 <printf@plt+0xa0>
  40064c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400650:	910003fd 	mov	x29, sp
  400654:	b9001fa0 	str	w0, [x29, #28]
  400658:	f9000ba1 	str	x1, [x29, #16]
  40065c:	b9401fa0 	ldr	w0, [x29, #28]
  400660:	b9002ba0 	str	w0, [x29, #40]
  400664:	52800020 	mov	w0, #0x1                   	// #1
  400668:	b9002fa0 	str	w0, [x29, #44]
  40066c:	14000015 	b	4006c0 <printf@plt+0x180>
  400670:	b9402fa1 	ldr	w1, [x29, #44]
  400674:	2a0103e0 	mov	w0, w1
  400678:	531e7400 	lsl	w0, w0, #2
  40067c:	0b010000 	add	w0, w0, w1
  400680:	531f7800 	lsl	w0, w0, #1
  400684:	b9002fa0 	str	w0, [x29, #44]
  400688:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40068c:	9126e000 	add	x0, x0, #0x9b8
  400690:	b9402fa2 	ldr	w2, [x29, #44]
  400694:	52800181 	mov	w1, #0xc                   	// #12
  400698:	97ffffaa 	bl	400540 <printf@plt>
  40069c:	b9402ba0 	ldr	w0, [x29, #40]
  4006a0:	528ccce1 	mov	w1, #0x6667                	// #26215
  4006a4:	72acccc1 	movk	w1, #0x6666, lsl #16
  4006a8:	9b217c01 	smull	x1, w0, w1
  4006ac:	d360fc21 	lsr	x1, x1, #32
  4006b0:	13027c21 	asr	w1, w1, #2
  4006b4:	131f7c00 	asr	w0, w0, #31
  4006b8:	4b000020 	sub	w0, w1, w0
  4006bc:	b9002ba0 	str	w0, [x29, #40]
  4006c0:	b9402ba0 	ldr	w0, [x29, #40]
  4006c4:	7100241f 	cmp	w0, #0x9
  4006c8:	54fffd4c 	b.gt	400670 <printf@plt+0x130>
  4006cc:	14000025 	b	400760 <printf@plt+0x220>
  4006d0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4006d4:	9126e000 	add	x0, x0, #0x9b8
  4006d8:	b9402fa2 	ldr	w2, [x29, #44]
  4006dc:	52800221 	mov	w1, #0x11                  	// #17
  4006e0:	97ffff98 	bl	400540 <printf@plt>
  4006e4:	b9401fa1 	ldr	w1, [x29, #28]
  4006e8:	b9402fa0 	ldr	w0, [x29, #44]
  4006ec:	1ac00c20 	sdiv	w0, w1, w0
  4006f0:	12001c01 	and	w1, w0, #0xff
  4006f4:	f9400ba0 	ldr	x0, [x29, #16]
  4006f8:	91000402 	add	x2, x0, #0x1
  4006fc:	f9000ba2 	str	x2, [x29, #16]
  400700:	1100c021 	add	w1, w1, #0x30
  400704:	12001c21 	and	w1, w1, #0xff
  400708:	39000001 	strb	w1, [x0]
  40070c:	b9401fa0 	ldr	w0, [x29, #28]
  400710:	b9402fa1 	ldr	w1, [x29, #44]
  400714:	1ac10c02 	sdiv	w2, w0, w1
  400718:	b9402fa1 	ldr	w1, [x29, #44]
  40071c:	1b017c41 	mul	w1, w2, w1
  400720:	4b010000 	sub	w0, w0, w1
  400724:	b9001fa0 	str	w0, [x29, #28]
  400728:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40072c:	91274000 	add	x0, x0, #0x9d0
  400730:	b9401fa2 	ldr	w2, [x29, #28]
  400734:	52800281 	mov	w1, #0x14                  	// #20
  400738:	97ffff82 	bl	400540 <printf@plt>
  40073c:	b9402fa0 	ldr	w0, [x29, #44]
  400740:	528ccce1 	mov	w1, #0x6667                	// #26215
  400744:	72acccc1 	movk	w1, #0x6666, lsl #16
  400748:	9b217c01 	smull	x1, w0, w1
  40074c:	d360fc21 	lsr	x1, x1, #32
  400750:	13027c21 	asr	w1, w1, #2
  400754:	131f7c00 	asr	w0, w0, #31
  400758:	4b000020 	sub	w0, w1, w0
  40075c:	b9002fa0 	str	w0, [x29, #44]
  400760:	b9402fa0 	ldr	w0, [x29, #44]
  400764:	7100001f 	cmp	w0, #0x0
  400768:	54fffb4c 	b.gt	4006d0 <printf@plt+0x190>
  40076c:	f9400ba0 	ldr	x0, [x29, #16]
  400770:	3900001f 	strb	wzr, [x0]
  400774:	d503201f 	nop
  400778:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40077c:	d65f03c0 	ret
  400780:	a9be53f3 	stp	x19, x20, [sp, #-32]!
  400784:	f9000fe0 	str	x0, [sp, #24]
  400788:	b90017e1 	str	w1, [sp, #20]
  40078c:	b0000080 	adrp	x0, 411000 <printf@plt+0x10ac0>
  400790:	91019013 	add	x19, x0, #0x64
  400794:	d1000673 	sub	x19, x19, #0x1
  400798:	3900027f 	strb	wzr, [x19]
  40079c:	f9400fe0 	ldr	x0, [sp, #24]
  4007a0:	f100001f 	cmp	x0, #0x0
  4007a4:	540000ca 	b.ge	4007bc <printf@plt+0x27c>  // b.tcont
  4007a8:	52800034 	mov	w20, #0x1                   	// #1
  4007ac:	f9400fe0 	ldr	x0, [sp, #24]
  4007b0:	cb0003e0 	neg	x0, x0
  4007b4:	f9000fe0 	str	x0, [sp, #24]
  4007b8:	14000002 	b	4007c0 <printf@plt+0x280>
  4007bc:	52800014 	mov	w20, #0x0                   	// #0
  4007c0:	f9400fe0 	ldr	x0, [sp, #24]
  4007c4:	f100001f 	cmp	x0, #0x0
  4007c8:	54000261 	b.ne	400814 <printf@plt+0x2d4>  // b.any
  4007cc:	d1000673 	sub	x19, x19, #0x1
  4007d0:	52800600 	mov	w0, #0x30                  	// #48
  4007d4:	39000260 	strb	w0, [x19]
  4007d8:	14000012 	b	400820 <printf@plt+0x2e0>
  4007dc:	b98017e1 	ldrsw	x1, [sp, #20]
  4007e0:	f9400fe0 	ldr	x0, [sp, #24]
  4007e4:	9ac10c02 	sdiv	x2, x0, x1
  4007e8:	9b017c41 	mul	x1, x2, x1
  4007ec:	cb010000 	sub	x0, x0, x1
  4007f0:	d1000673 	sub	x19, x19, #0x1
  4007f4:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x500>
  4007f8:	9127a021 	add	x1, x1, #0x9e8
  4007fc:	38606820 	ldrb	w0, [x1, x0]
  400800:	39000260 	strb	w0, [x19]
  400804:	b98017e0 	ldrsw	x0, [sp, #20]
  400808:	f9400fe1 	ldr	x1, [sp, #24]
  40080c:	9ac00c20 	sdiv	x0, x1, x0
  400810:	f9000fe0 	str	x0, [sp, #24]
  400814:	f9400fe0 	ldr	x0, [sp, #24]
  400818:	f100001f 	cmp	x0, #0x0
  40081c:	54fffe0c 	b.gt	4007dc <printf@plt+0x29c>
  400820:	7100029f 	cmp	w20, #0x0
  400824:	54000080 	b.eq	400834 <printf@plt+0x2f4>  // b.none
  400828:	d1000673 	sub	x19, x19, #0x1
  40082c:	528005a0 	mov	w0, #0x2d                  	// #45
  400830:	39000260 	strb	w0, [x19]
  400834:	aa1303e0 	mov	x0, x19
  400838:	a8c253f3 	ldp	x19, x20, [sp], #32
  40083c:	d65f03c0 	ret
  400840:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400844:	910003fd 	mov	x29, sp
  400848:	52800c80 	mov	w0, #0x64                  	// #100
  40084c:	b9003fa0 	str	w0, [x29, #60]
  400850:	910063a0 	add	x0, x29, #0x18
  400854:	d2800282 	mov	x2, #0x14                  	// #20
  400858:	52800001 	mov	w1, #0x0                   	// #0
  40085c:	97ffff2d 	bl	400510 <memset@plt>
  400860:	910063a0 	add	x0, x29, #0x18
  400864:	aa0003e1 	mov	x1, x0
  400868:	b9403fa0 	ldr	w0, [x29, #60]
  40086c:	97ffff78 	bl	40064c <printf@plt+0x10c>
  400870:	910063a1 	add	x1, x29, #0x18
  400874:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  400878:	91280000 	add	x0, x0, #0xa00
  40087c:	97ffff31 	bl	400540 <printf@plt>
  400880:	52807d00 	mov	w0, #0x3e8                 	// #1000
  400884:	b9003fa0 	str	w0, [x29, #60]
  400888:	b9803fa0 	ldrsw	x0, [x29, #60]
  40088c:	52800141 	mov	w1, #0xa                   	// #10
  400890:	97ffffbc 	bl	400780 <printf@plt+0x240>
  400894:	f9001ba0 	str	x0, [x29, #48]
  400898:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  40089c:	91280000 	add	x0, x0, #0xa00
  4008a0:	f9401ba1 	ldr	x1, [x29, #48]
  4008a4:	97ffff27 	bl	400540 <printf@plt>
  4008a8:	52807d00 	mov	w0, #0x3e8                 	// #1000
  4008ac:	b9003fa0 	str	w0, [x29, #60]
  4008b0:	b9803fa0 	ldrsw	x0, [x29, #60]
  4008b4:	52800201 	mov	w1, #0x10                  	// #16
  4008b8:	97ffffb2 	bl	400780 <printf@plt+0x240>
  4008bc:	f9001ba0 	str	x0, [x29, #48]
  4008c0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008c4:	91280000 	add	x0, x0, #0xa00
  4008c8:	f9401ba1 	ldr	x1, [x29, #48]
  4008cc:	97ffff1d 	bl	400540 <printf@plt>
  4008d0:	52807d00 	mov	w0, #0x3e8                 	// #1000
  4008d4:	b9003fa0 	str	w0, [x29, #60]
  4008d8:	b9803fa0 	ldrsw	x0, [x29, #60]
  4008dc:	52800101 	mov	w1, #0x8                   	// #8
  4008e0:	97ffffa8 	bl	400780 <printf@plt+0x240>
  4008e4:	f9001ba0 	str	x0, [x29, #48]
  4008e8:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x500>
  4008ec:	91280000 	add	x0, x0, #0xa00
  4008f0:	f9401ba1 	ldr	x1, [x29, #48]
  4008f4:	97ffff13 	bl	400540 <printf@plt>
  4008f8:	52800000 	mov	w0, #0x0                   	// #0
  4008fc:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400900:	d65f03c0 	ret
  400904:	00000000 	.inst	0x00000000 ; undefined
  400908:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40090c:	910003fd 	mov	x29, sp
  400910:	a901d7f4 	stp	x20, x21, [sp, #24]
  400914:	90000094 	adrp	x20, 410000 <printf@plt+0xfac0>
  400918:	90000095 	adrp	x21, 410000 <printf@plt+0xfac0>
  40091c:	91374294 	add	x20, x20, #0xdd0
  400920:	913722b5 	add	x21, x21, #0xdc8
  400924:	a902dff6 	stp	x22, x23, [sp, #40]
  400928:	cb150294 	sub	x20, x20, x21
  40092c:	f9001ff8 	str	x24, [sp, #56]
  400930:	2a0003f6 	mov	w22, w0
  400934:	aa0103f7 	mov	x23, x1
  400938:	9343fe94 	asr	x20, x20, #3
  40093c:	aa0203f8 	mov	x24, x2
  400940:	97fffee0 	bl	4004c0 <__libc_start_main@plt-0x40>
  400944:	b4000194 	cbz	x20, 400974 <printf@plt+0x434>
  400948:	f9000bb3 	str	x19, [x29, #16]
  40094c:	d2800013 	mov	x19, #0x0                   	// #0
  400950:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400954:	aa1803e2 	mov	x2, x24
  400958:	aa1703e1 	mov	x1, x23
  40095c:	2a1603e0 	mov	w0, w22
  400960:	91000673 	add	x19, x19, #0x1
  400964:	d63f0060 	blr	x3
  400968:	eb13029f 	cmp	x20, x19
  40096c:	54ffff21 	b.ne	400950 <printf@plt+0x410>  // b.any
  400970:	f9400bb3 	ldr	x19, [x29, #16]
  400974:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400978:	a942dff6 	ldp	x22, x23, [sp, #40]
  40097c:	f9401ff8 	ldr	x24, [sp, #56]
  400980:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400984:	d65f03c0 	ret
  400988:	d65f03c0 	ret

Disassembly of section .fini:

000000000040098c <.fini>:
  40098c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400990:	910003fd 	mov	x29, sp
  400994:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400998:	d65f03c0 	ret
